Senior Soc Top Engineer

In 2023, Brussels approved 8.1 billion euros to boost the development of semiconductor technologies in Europe. The industry requires public aid to mobilize private investment, and in this chapter, it is expected to create 8,700 direct job opportunities. With this, microchips may become the backbone of Europe's industrial competitiveness in the coming years.

Our partner, a direct collaborator in the RISC-V architecture, is actively involved in a fierce battle against the "monopoly" ARM, leading companies like Google to consider shifting their future processors towards this architecture. This move addresses the growing need to incorporate AI into chips for mobiles, tablets, smartwatches, and ultimately any IoT device in the future. They are currently seeking to add talented individuals like you to their team.

Today, they boast highly specialized professionals in this field and have forged alliances with key industry partners, in addition to running their own training academy to nurture critical talent for their business. They are currently looking to onboard Senior Talent and Leads, and they invite you to be part of this exciting journey as a Senior SoC Top Design and Integration Engineer is vital in crafting solutions for our semiconductor lineup. Working within the SoC Top Team, you'll collaborate closely with adept engineers from various teams to engineer efficient and high-performing SoC Top designs crucial for contemporary applications. Your mission involves ensuring that the final product meets stringent quality standards, performance criteria, and customer expectations.

• SoC Top Architecture and design
• IP Integration
• Verification and Validation

• Experience with IP Integration
• Experience with Clock strategy and distribution
• Experience with Reset strategy and distribution
• Experience with Top Level
• Knowledge of AMBA protocols (AXI, APB, AHB)
• Knowledge of CHI protocol
• Experience with power envelope and domain
• Proficiency in tools and methodologies related to SoC Design, Verification and Validation
• Proficiency in RTL design using Verilog or VHDL
• Knowledge of scripting languages (Python, Perl, Bash, TCL)
• Experience with EDA tools and synthesis
• Experience with Timing and Timings Constraints
• Experience with basic block level testing
• Strong problem-solving skills and attention to detail
• Excellent communication and teamwork abilities

• Knowledge of RISC-V and RISC-V Vector Extension
• Knowledge of SOC verification
• Knowledge of GLS verification
• Knowledge of the JIRA tool
• Experience with high frequency designs
• Experience with ASIC and FPGA design is a plus

Type: Permanent

Category: IT

Date Posted: 2024-03-27